Memory Capacity; Booster; Data Security; Hardware Design - Ingenico IWL220 Technical Manual

CRYPTO CPU (booster) RISC 32-bits ARM7 processor with flash and RAM memory
Clock frequency 57 MHz
Capacity 50 MIPS
Calendar Leap-year management
The power of the iWL2xx's processors gives the following performance:
3DES  less than 10µs.
Algorithm
Keys
1024 exp 3
16
1024 exp 2 + 1
2048 exp 3
16
2048 exp 2 + 1
2.3.2.

Memory capacity

Memory
Internal SDRAM
Internal Flash
µSD card reader
2.3.3.

Booster

The booster is a secured ASIC (crypto processor) including all the secured functions which
protect the device against various attacks.
The booster embedded has an impact on security personalization.
2.3.4.

Data security

2.3.4.1.

Hardware design

The terminal was designed to be tamper sensitive, in order to preserve the sensitive data
(keys or confidential code) and to delete this data as soon as a tamper attempt is detected.
Tamper detection
Protection against tampering:
By micro switches
By temperature monitoring
Technical manual _iWL220/250
ICO_MKP_009_GU_EN_V4
RSA SDA
0,4 ms 1 ms
3 ms 8 ms
1,1 ms 3 ms
9 ms 24 ms
iWL220
16MB up to 32MB
16MB up to 128MB
Optional
17/60
DDA
1,5 ms
13 ms
4,5 ms
38 ms
iWL250
32MB
128MB
Standard
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