Sub-Synthesizer And Het; Fm Circuitry - Fluke 6060B Instruction Manual

Synthesized rf signal generator
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MAINTENANCE
TROUBLESHOOTING AND
REPAIR
4D-16
or
lO-kHz
digit
is
inoperative or the
frequency
jumps
as the
I
-MHz
digit
is
programmed,
the
problem
is
likely
the
triple-modulus
prescalar.
If
the
lower order (1-kHz, 100-Hz,
10-
Hz)
digits
cannot
be
programmed,
the
problem
is
the sub-synthesizer or
single
sideband
mixer.
4D-38.
Sub-Synthesizer
and
MET
(800
MHz),
40-MMz Loop
The
frequency
at
TP24
and
TP25
should be 20
MHz.
The
frequency
at
U64
pins
14
and
1
5
should be
40
MHz.
If
the
40-MHz
signal
is
present,
but not
the
20
MHz,
the
problem
is
most
likely
with
Q4, Q5, U35,
or U34.
If
the
40-MHz
signal
is
in
error,
the
problem
is
in
the
40-MHz
loop.
Check
the
frequency
at
the
40-MHz VCO,
U64
pin
3.
It
should be 40
MHz.
If
it
is
not,
lift
the
op-amp
end
of
R
169,
and
connect
it
to
a variable
power
supply
set
to
approximately
6V.
The
signal
at
U64
pin
3
should be approximately
a
40-MHz
ECL
level
(approximately 3.2V
to
4.2V)
signal.
By
varying
the
supply
voltage,
the
frequency should
change.
A
similar signal
should be
present
at
U64
pin
2.
Check
to see
if
U64
pin
1
1
is
ECL
low (approximately
3.2V).
The
output
of
TTL
buffer
U65
pin
8
should be approximately 40
MHz.
The
output of
the
divide-by^, U66, should be
approximately
10
MHz.
Once
again,
if
the
frequency
is
greater
than
10
MHz,
pulses
should
exist at
TP52
and
the
output
of
op-amp U60
pin
6
should be
low.
If
the
frequency
is
below
10
MHz,
pulses
should existatTP49,
and
the
op-
amp
should
be high
(approximately
24V).
The
loop should
lock
when
the
operator
reconnects
R169.
If
the
TP
checks
are
all
right
and
the
800-MHz
oscillator
is
not locked
when
in
the
HET
band,
the
problem
is
either
with
the
800-MHz VCO,
the
divide-by-4(U6l),
the divide-by-
5
(U62, U63), or
the
logic that
controls the
switched
+5V,
Program
the
UUT
to
320
MHz.
The
frequency
at
TP27
(the
output of
the sub-synthesizer
gate array
U33)
should be
10
MHz
if
the input
signals
are
correct.
The
frequency
at
TP12
should be
1
MHz,
and
TPl
1
should be 20
kHz. There
should be
a20-kHzsine wavealthe
hot
end
of
R33.
The
signals
at
the
output of
the
active
quadrature
generator,
UlO
pin
8
and
UlO
pin
14
should be approximately 300
mv
p-p
sine
waves
that are
90° apart
in
phase.
Use
a dual-trace Oscilloscope for
verification.
The
frequency
at
TP27
should
change 500
kHz
for a
I-kHz change
in
the
programmed
frequency,
and
50
kHz
for
a
100-Hz
change,
etc.
4D-39.
FM
Circuitry
Program
the
UUT
to
500
MHz, JNT FM,
99.9-kHz
deviation,
and 1-kHz modulation
frequency.
There should
be a
2V
p-p
1-kHz
sine
wave
at
TP22.
Program 50-kHz
deviation,
and
the
level
should
drop
to
1
V
p-p.
Reprogram
the deviation
to
99.9-kHz,
The
level
of
the
output
of the
KV
DAC,
U2S
pin
7
will
be approximately
1.5V p-p
depending
on
the
FM
correction value
(KV)
in
the
EPROM.
The
signals at
TP32
and
TP33
should be approximately
the
same,
depending on
how R87
is
set.
The
output
of the
audio
integrator
should be about
1
V
p-p.
To
check
the
FM
range,
program
the
UUT
to
9.99-kHz
deviation.
The
ac voltage
at
TP32
should
drop
to
10%
of
the
99.9-kHz
value.
Program
999-Hz,
and
the voltage
should
drop
to
1
%
of
the
99.9-kHz
value.
The INT/
EXT
FM
selection
is
done on
the
A2A4
Output
PCA. The
controls are
listed in
Table 4D-17.
Tables
4D-12 and 4D-1
3
provide
FM
range
and
FM DAC
(10
bits)
control information.
I
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