Controller Pca; Microprocessor; Attenuator Control Interface - Fluke 6060B Instruction Manual

THEORY OF
OPERATION
functions 83 through 86 allow
the
direct selection
of four of the
five
24-dB
attenuators.
The
other
24-dB attenuator
is
selected
by programming
the
appropriate
level
(-12
dBm).
Coupling
capacitors
C6 and C7
protect against
dc
or low-frequency
power.
The
diode
limiter,
consisting of
CR2
through
CR9, provides protection against
medium
RF
Power
levels
and
short-term
(fast
acting)
protection against
high
RF
power
levels.
Long-term
(latched) protection
is
provided by
relay
K8
whenever the reverse
RF
pwer
exceeds a
preset
level.
RF
power
detected
by
CRl
is
compared
with the preset voltage in
one
section
of
comparator Ul.
When
the delected voltage exceeds
the set
value, the
output of
U1
pin
1
goes
positive,
turning
on Ql and
Q2. This actuates
K8
to the
protect position. In the
protect position, the
output connector
is
shorted to
ground and
the
Generator output
is
disconnected
from
the
output connector.
CR
1
5
and
R6
form
a latching
network
such that
K8
remains
in
the protect position until
the
Generator
RF
Output
is
reset
by an
RF ON
entry.
The output of the
comparator
is
buffered and
sent as
RPTRPL
to interrupt the
Controller
signal that
annunciates
the
RPP
trip
condition
by flashing the
UNCAL
and
RF OFF
indicators.
3-58.
Controller
PCA,
A2A7
The
Controller,
under the direction
of
the
instrument
software,
handles the
data
interface
between
the front panel,
remote
interface,
and
Generator
functions.
The Controller
is
located in
a top
side
compartment
of the
module
section,
A2.
The Controller printed
circuit
assembly
consists
of the following functional groups:
Microprocessor
and
its
interface circuitry
Attenuator control interface
Front panel
interface
IEEE-488 Interface
Memory
ICs
and addressing
circuitry
Module I/O
circuitry
Reset
circuit
Status
and control latches
3-59.
MICROPROCESSOR
The
heart of the
Controller
assembly
is
Ul, a
TMS9995
16/8
bit
microprocessor.
The
digital
system clock
signal
is
generated
by an
oscillator
comprised of
gates
from
U5 and
crystal
U41
.
When
enabled, bidirectional buffer
U4
provides additional drive current to
the
data bus operation;
when
it is
disabled,
it
isolates
the
microprocessor
from
the
system
data
bus. Buffers
U33, U34, and
UlO
provide
extra drive current to the
microprocessor
address
and
control signals.
3-60.
ATTENUATOR CONTROL
INTERFACE
The attenuator control
signals are
latched
by U27.
Darlington
drivers
U30 and
U31
control the
Relay
Drivers
A2A5A5 PCA.
3-61.
FRONT PANEL
INTERFACE
Data
is
transferred to
and from
the front panel
circuitry
through
tri-state
bidirectional
data buffer
U
18.
This buffer
is
active
when
a
front
panel
latch
is
addressed
and
the buffer
control
signal
from U17
is
low; otherwise,
it is
in the
high-impedance
state.
The
front
panel
latch select lines
are
decoded by U36.
To
reduce
RF
emissions
from
the
Generator,
low-pass
filters
comprised
of the following
components
are used
on
the following signals:
3-23