Sharp PC-4741 Service Manual page 61

9·5. INS82C50A asynchronous
COlililiuliicalioli elemellt
1. General description and features
Enhances interface with almost any microprocessor
Add/delete of suffixed bit(s) (START, STOP, PARITY) for async
communication
Full double buffer method that does not require precise
synchronization
• Independently controlled transmit, receive, line status, data set
interrupts
• 1 - (216 - 1) divided programmable buad rate generator (Internal
16
x
clock generation)
Independent receiver clock input
• Modem control functions (CTS, RTS, DSR, DTR, RI, DCD)
• Serial interface format full compatible
-5,6,7,8 bits character size
- Even. off, non parity
-1, 1-211, stop bits
- Baud rate generation (DC - 56K bauds)
Illogical start bit detection
• Variety of status information
• Bidirectional data bus, control bus directly controlled trt-state TIL
driver
• Start and detect of line break
Internal self-diagnostics
- Device intemalloopback control
- Break, parity, overrun, framing error simulation
• Interrupt controlled with priority
TIming waveforms
All waveforms are explained in reference to bit 0 and 1.
AC test point Intemal clock (3.1 MHz,max.)
~~"
XTALl
~ ~'l.ov
-F"c -F"c 2.,
~ ~ ~" ~ ~ ~.8V
Tl.iCtS
BAODOUTtiming
XTAl1
(+N,N>3) I;:'
==~I.u.w.2xTA!.'C'((;U;S'-----
Write cycle
TiJ'STRiDISTR
-=========~~~~~~~~
___
/X"~
'A",C:.:T"::'
~~~~7
- ( VAUD DATA ) - -
-59-
A2,Al,A
,
-m!2.CSt,CS
a
......
CSOU
T
llUSTRJDOSTR
l5IS'I'R7DlSTR
0015
DATA
00-07
Read cycle
~
~
VAllO
I·
t :-:
~
'"
--I"".
VALID
~.
~
.........
\
............ ............
~
-
"
,~ ~
ACTIVE
~
I-+-~ ~~.
\
~
-I,...:::!
8-
~
VAUO DATA
ADS fixed
to
low level for measurement
Receiver timing
RCLK
-.fl
nL,!I-_--'fL
.=
I !-lSCO
SAMPlEClK _ _ _ _ _ _ _ _ _ _ _ _
IL
-
P G-4741
'~
ACTIVE
1' "
)( ACTIVE
~
6~~E L-_L--1_~.LI--L--1--L~~--L14.-
-0\
I:=~
_____
>--,
INTERRUPT
I ~
(Data ready or _ _ _ _ _ _ _ _ _ _ _
---1 """
RCVA
ERR)
l'lTSTRibISTA
®
ACTIVE
(RaadREC
dalabIJUer or ROLSR)
Transmitter timing
SERIAL
OUT(SOUT)
\srN'.rj
INTERRU~~
(THRE)
15JSTJiibISTR
CD
IH'I~
(WRTHR)
DATA(S-!l)
~ST~~~'Ir...
___ _
J,,,,,,
j
t;::~~
~\ ~l ~
:-j",F
15JSTJiibISTR
® _______________
~~
(RD i(R)
Modem control timing
nt5STlUOOSTR
CD
~-c----~~-----
(WATHR)
r
lMOO
~oo
_ _
""'''''' \' y'-
-rnJIT,mJT2 \.
(j) : Refer to write cycle.
® :
Refer to read cycle.