Bit Error Rate (V.52) Diagnostics - Patton electronics 2720/I Series User Manual

5.2.3 CSU Loop
The NetLink-T1™ also responds to central office initiated loop com-
mands. The NetLink-T1™ will implement the "loop up" command when
it recognizes the pattern "10000" in the data stream for a minimum of 5
seconds. The "loop down" command is implemented by the pattern
"100" in the data stream for a minimum of 5 seconds.
When operating in ESF framing mode, loopback commands are
issued via the Facility Data Link (FDL). The line loop message will
cause a loop back before data enters the framer portion of the CSU.
The payload loop message will cause the NetLink-T1™ to loop data
after the framer portion of the CSU.
The NetLink-T1™ will respond to Universal Loopback De-activate
to clear all central office loops.

5.3 BIT ERROR RATE (V.52) DIAGNOSTICS

The NetLink-T1™ offers three V.52 Bit Error Rate (BER) test pat-
terns. These test patterns may be invoked along with the LAL and
RDL tests to evaluate the unit(s) and the communication links.
When a 511, 2047, or QRSS test is invoked, the NetLink-T1™
generates a pseudo-random bit pattern of 511 bits, 2047 bits or 2
bits, respectively, using a mathematical polynomial. The receiving
NetLink- T1™ then decodes the received bits using the same polyno-
mial. If the received bits match the agreed upon pseudo-random pat-
tern, then the NetLink-T1™(s) and the communication link(s) are func-
tioning properly.
511
2047
QRSS
Initiates a built-in 511 bit pseudo-random
pattern generator and detector.
Initiates a built-in 2047 bit pseudo-random
pattern generator and detector.
Initiates a built-in 2
pattern generator and detector.
37
20
bit pseudo-random
20