Table of Contents
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Syntax
[ label ]
Operands
o
Execution
(PC) + 1
Constant
Encoding
Description
The two low-order CNF bits of the instruction word are copied into the CNF0
and CNF1 field of status register ST1. The CNF0 and CNF1 status bits config-
ure the on-chip RAM blocks into program or data memory. The bit combina-
tions and their meanings are shown below in the CONF mode decoding table.
Words
1
Cycles
TMS320C26
TMS320C26
Example
CONF 2
Configure Blocks as Data/Program Memory (TMS320C26 Only)
CONF constant
constant
3
PC
program/data memory configuration mode status bits
15
14
13
12
11
10
1
1
0
0
1
1
Cycle Timings for a Single Instruction
PI/DI
PI/DE
1
1
Cycle Timings for a Repeat Execution
n
n
CONF Mode Decoding Table
CNF1
CNF0
0
0
0
1
program
1
0
program
1
1
program
;Status register bit CNF1 is set to 1 and
;Status register bit CNF0 is set to 0, thus
;configuring the blocks B0 and B1 as
;program memory, B2 and B3 as data memory.
9
8
7
6
5
4
1
0
0
0
1
1
PE/DI
PE/DE
PR/DI
1+p
1+p
n+p
n+p
B0
B1
data
data
data
data
data
program
data
program
data
CONF
3
2
1
0
1
1 CNF1 CNF0
PR/DE
1
1
n
n
B2
B3
data
data
data
program
4-77
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