STMicroelectronics STEVAL-IHT008V1 User Manual page 20

Inrush-current limitation
charging the DC capacitor, the Triac must be turned on. To reduce the inrush current, the
Triac is first triggered at the end of the line voltage cycle, just a few hundred microseconds
before the line zero voltage. This allows the output capacitor (refer to C in
"Solution using relays to limit inrush current and standby
level (around 10 to 30 V) and not directly to the peak line voltage. The current driven from
the line is then much lower than in case of directly charging the DC capacitor completely.
This soft-start solution can only work when an inductor is present on the line side as the
current increase rate must also be limited to avoid Triac damage. Such an inductor is
already present for most applications where the EMI filter usually embeds a common-mode
choke which has a differential-mode parasitic inductor due to the copper turns of the
windings.
In our STEVAL-IHT008V1, the EMI filter is implemented by C6-C7 X2 capacitors, C2-C4-
C5-C8 Y2 capacitors, and the L1 common-mode inductor. This inductor features a 12 mH
value in common-mode but also a 10 µH inductor in differential mode. This is the
differential-mode value which allows the reduction of the rate of increase of the line current
each time Triac T_ICL is turned on.
To allow a complete charge of this capacitor to the peak line voltage, the Triac must be
triggered on the following cycle with a shorter turn-on delay than the first one used to start
the charge. In this way, by reducing the Triac turn-on delay by a few tens or hundreds of
microseconds from half-cycle to half-cycle, the output capacitor is progressively charged
while the line current is kept low.
In the STEVAL_IHT008V1 MCU firmware, the Triac turn-on delay reduction step is
constant from one half-cycle to the following one. This step is called
Step_Phase_Control in the firmware. It is set by the Max_Inrush_Current_Order
routine which reads the voltages set by the "MAX_INRUSH CURRENT" potentiometer.
When the T_ICL Triac turn-on delay is lower than 3 ms, the gate pulse is directly set to a
continuous DC pulse (starting typically 70 µs after VAC zero voltage). Indeed, below a
delay of approximately 5 ms or 4.2 ms (for 50 and 60 Hz line frequencies, respectively), the
output DC capacitor is fully charged. Therefore, it is not necessary to ensure a soft start for
turn-on delays much lower than a fourth cycle.
the max T_ICL turn-on delay is defined by the ICL_CTRL_Delay in the
firmware. The minimum value of 3 ms is defined by the
Phase_Control_ON_Max which sets the maximum T_ICL ON time (7 ms, refer
to directive definitions in the firmware).
Figure 14: "Inrush current during STEVAL-IHT008V1 startup on 230 V line (500 µF output
DC capacitor)"
line (500 µF output DC
charging. The test is performed at startup when the STEVAL-IHT008V1 board is connected
to a 230 V 50 Hz grid, while the output DC capacitor is completely uncharged (i.e., its initial
voltage is null). The output DC capacitor is implemented in this case by the series
association of C1 and C9 for an equivalent capacitance of 500 µF.
the electric parameters of
current during start-up"
HVDC output"
"Connection of a PFC at the HVDC
capacitor C3 as no PFC is used.
20/37
(same as Figure 4: "Inrush current at STEVAL-IHT008V1 startup on 230 V
capacitor)") shows an example of such progressive DC capacitor
Figure 15: "Triac current zoom for the highest peak
are defined in
(arrow head gives the hot-point of the voltage). In
DocID029048 Rev 1
losses") to be charged to a low
Figure 3: "Connection of a PFC at the
output", VDC is actually the voltage across
UM2027
Figure 5:
Figure 3: