Xilinx VC707 Getting Started page 11

Run BIST
1.
2.
X-Ref Target - Figure 1-7
Host
Computer
(UART label)
3.
4.
X-Ref Target - Figure 1-8
Getting Started with the VC707 Evaluation Kit
UG848 (v1.4.1) October 14, 2015
Complete the tasks under
Connect the VC707 board to the host computer and power supply as shown in
Figure 1-7.
USB cable
standard-A plug
to mini-B plug
To J17
Figure 1-7: BIST Board Connections
Turn board power on (SW12).
Set DIP switch SW11 as shown in
SW11
1 2 3 4 5
Figure 1-8: SW11 BIST Settings
www.xilinx.com
Preliminary Setup, page 6.
SW9
To J18
SW11
Figure 1-8.
Upper Flash ADDR = 0b11
FLASH_A25
points to the BIST bitstream
FLASH_A24
in BPI flash memory at U3
FPGA_M2
Master BPI Mode = 0b010
FPGA_M1
configures FPGA from
BPI flash memory at U3
FPGA_M0
1 (On)
0 (Off)
Built-In Self Test
Board Power
Switch SW12
Power Supply
100VAC–240VAC Input
12 VDC 5.0A Output
UG848_c1_06_040314
UG848_c1_07_062112
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