IBM 7013 J Series Operator's Manual page 234

DTR Register Test
CTR Register Test
Miscellaneous Registers Test
This test checks accessibility to the MC68230 chip and its internal registers. It is made up of
two sub-tests which don't access the h/w parts connected to MC68230. All the checked
registers will be saved and restored.
Data Lines Test
DTR Register Test
CPU accessibility Test
This test checks the minimum dialog that must be available between the BUMP and the
CPUs.
The BUMP puts a code in NVRAM. The launched CPU must modify this code in a specific
way. The BUMP checks that this code has been correctly modified.
Asynchronous lines access test
This test needs an external plug on the asynchronous lines connector; this plug loops the
transmit line to the receive line and the same junction signals to the other ones. A set of
characters is sent on the transmit line and must be read on the receive line. This is also true
for the junction signals.
BPP lines access test
This test needs an external plug on the bidirectional parallel port (BPP) connector; this plug
allows visualization of the output pins of the BPP part on LEDs. The test program switches
on and off these LEDs.
Printer test
This test needs to connect a printer on the BPP port. The test writes a text on this printer.
The control is made by the operator by verifying the printed text.
VPD Coherency Test
This test checks the coherency of VPD data, that are stored in the configuration table.
A-6
Operator Guide
This test writes, reads and compares a 1 among 0 bits in DTR
registers.
This test writes, reads and compares a 1 among 0 bits in CTR
registers. It saves and restores the CTR register value.
This test writes, reads and compares a 1 among 0 bits in the PGCR
register.
In this test following registers are checked, by write, read, and
compare operations.
0. PGCR
1. PSRR
2. PADDR
3. PBDDR
4. PCDDR
5. PACR
6. PBCR