Figure 3-13. Synthesizer Block Diagram (Vhf); Figure 3-14. Synthesizer Block Diagram (700/800 Mhz) - Motorola APX 3000 Detailed Service Manual

Theory of Operation: Main Board
16.8MHz
BUFFER
16.8MHz
TRIDENT IC
16.8MHz
BUFFER
16.8MHz
TRIDENT IC
3.1.4.1 Reference Oscillator Y701
The radio's frequency stability and accuracy is derived from the Voltage-Controlled Temperature-
Compensated Crystal Oscillator (VCTCXO), Y701. This 16.8 MHz oscillator is controlled by the
voltage from the AUX_DAC pin of the Trident IC, U702, that can be programmed through a serial
peripheral interface (SPI). The oscillator output at pin 3 is coupled through capacitor C736 to the
Trident IC reference oscillator input. This reference is then passed through an internal buffer and is
then coupled to the external BJT buffer (comprised of U746 and supporting circuitry) via C739.
These buffers provide isolation for the 16.8 MHz output to the controller circuitry and ABACUS IC.
Components L753 and C754 form a low-pass filter to reduce the harmonics of the 16.8 MHz.
ND
2
2
LOOP
FILTER
PRESCALAR
BUFFER

Figure 3-13. Synthesizer Block Diagram (VHF)

16.8MHz REFERENCE CLOCK (To Controller and Abacus IC)
LOOP
FILTER
PRESCALAR
BUFFER

Figure 3-14. Synthesizer Block Diagram (700/800 MHz)

VHF DIVIDE-BY-2
HARMONIC FILTER
PRE
BUFFER
VCO 1
VCO 2
PRE
VCO 3
BUFFER
TX
BUFFER
VHF TX
VHF RX
TX
BUFFER
7/800 TX
7/800 RX
3-15
TX LO
RX LO
TX LO
RX LO