Fractional-N Synthesizer; Voltage Controlled Oscillator (Vco); Figure 3-8. 200 Mhz Synthesizer Block Diagram - Motorola HT1250-LS+ Service Manual

Theory of Operation
3.7.2

Fractional-N Synthesizer

The Fractional-N synthesizer, shown in Figure 3-8, uses a 16.8 MHz reference oscillator (Y3762) to
provide a high stability reference for the system. Stability is better than 2.5 ppm over temperatures of
-30 to 60 °C. Electronic frequency adjustment is achieved by an internal DAC which provides a
frequency adjustment voltage from U3701 pin 25 to the reference oscillator module. The synthesizer
IC U3701 further divides the 16.8 MHz signal (applied to U3701 pin 23) to 2.1 MHz, 2.225 MHz, or 2.4
MHz for use as reference frequencies. It also provides 16.8 MHz at U3701 pin 19 for use by the
ASFIC. A loop filter (C3723-4, R3722-3) removes noise and spurs from the steering voltage applied to
the VCO varactors, with additional filtering located in the VCO circuit.
To achieve fast locking for the synthesizer, an internal adapt charge pump provides higher current at
U3701 pin 45 to quickly force the synthesizer within lock range. The required frequency is then locked
by normal mode charge pump at pin 43. Both the normal and adapt charge pumps get their supply
from the capacitive voltage multiplier made up of C3701-4 and D3701-2. Two 3.3V square waves from
U3701 pins 14-15 provide the drive signals for the voltage multiplier, which generates 13.3V at U3701
pin 47. This voltage is filtered by C3705-6 and C3714.
One of the auxiliary outputs of the synthesizer IC (pin 48) controls transistor switch Q3721 which
outputs a T5 voltage source during transmit and R5 during receive.
DATA (U409 Pin 100)
CLOCK (U409 Pin 1)
CSX (U409 Pin 2)
MOD IN (U404 Pin 40)
+5V (U3711 Pin 4)
5,20,34,36
(U3201 Pin 5)
Reference
Oscillator
Voltage
Multiplier
3.7.3

Voltage Controlled Oscillator (VCO)

The VCOBIC (U3801), shown in Figure 3-9, in conjunction with the Fractional-N synthesizer (U3701)
generates RF in both the receive and the transmit modes of operation. The TRB line (U3801 pin 19)
determines which oscillator and buffer are enabled. A sample of the RF signal from the enabled
oscillator is routed from U3801 pin 12 through a low pass filter, to the prescaler input of the
synthesizer IC (U3701 pin 32). After frequency comparison in the synthesizer, a resultant DC control
voltage is used to steer the VCO frequency. When the PLL is locked on frequency, this voltage can
7
DATA
8
CLK
9
CEX
10
MODIN
13,30
V , DC5V
CC U3701
V , 3.3V
Low Voltage
DD
Fractional-N
23
XTAL1
Synthesizer
25
WARP
32
PREIN
47
VCP
VMULT2 VMULT1
14

Figure 3-8. 200 MHz Synthesizer Block Diagram

4
LOCK
19
FREFOUT
6,22,23,24
GND
43
IOUT
45
IADAPT
41
MODOUT
3
AUX4
2
AUX3
28
SFOUT
40
BIAS1
39
BIAS2
AUX1
15 48
Transistor
5V
Prescaler In
LOCK (U409 Pin 56)
FREF (U404 Pin 34)
Steering
2-Pole
Line
Loop Filter
TRB
Voltage
Controlled
Filtered 5V
Oscillator
R5
Dual
T5
3-9
LO RF
Injection
TX RF
Injection
(First Stage of PA)