Table 3-9. Power And I/O Pins For Nl5500; Figure 3-34. Gps Block Diagram - Motorola APX 3000 Detailed Service Manual

Theory of Operation
: Global Positioning System (GPS)
Signal Name Type
VBAT Power
VDDS Power
VDD_TCXO Power
RTC_CLK Clock
TCXO_CLK_LV Clock
GPS_nShutdown Input
GPS_UART_TX Output
GPS_UART_RX Input
LNA_ENABLE Output
GPS_LNA_IN Input
.
Ant

Table 3-9. Power and I/O Pins for NL5500

NL5500 ball(s) Source/Destination [ref] (board
A2, H1, D8 VSW_3.6 [U6504] (
B3, G10, K5, E2 VCC_1.85 [U6508] (
G1 VSW_3.6 [U6504] (
H9 CPLD IO74 [U6101] (
Board)
F1 TCXO [Y1304] (
D5 CPLD IO91 [U6101] (
Board)
F5 OMAP pin R9 [U6302] (
Board)
E3 OMAP pin M18 [U6302] (
Board)
H6 LNA [U1304] (
L2 GPS antenna/front-end
LNA Enable
SAW LNA SAW

Figure 3-34. GPS Block Diagram

Main
Board)
Main
Board)
Main
Board)
Main
Main
Board)
Main
Main
Main
Main
Board)
External Regulators
3.6V
2.8V
(VSW_3.6) (VCC_1.85)
VBAT
GPS_EXT_LNA_EN (H6)
TCXO_CLK_LV (F1)
GPS IC
GPS_LNA_IN (L2)
TI NL5500
GPS_UART_TX (F5)
GPS_UART_RX (E3)
GPS_NSHUTDOWN (D5)
Description
Main NL5500 power supply
I/O Power Supply
TCXO Power Supply
32kHz RTC
26MHz TCXO
GPS Reset
GPS UART TX to OMAP UART RX
OMAP UART TX to GPS UART RX
GPS External LNA Enable
GPS RF Input from antenna
Main Board
1.8V
VDDS
VDD_TCXO (G1)
TCXO
26MHz,
<0.5ppm
[OMAP 1710]
GPS Tx
UART2 Rx (R9)
GPS Rx
UART2 Tx (M18)
[CPLD]
32kHz RTC
RTC_CLK (H9)
IO74 (E2)
Reset
IO91 (D12)
3-45