Antenna Switch - Motorola APX 3000 Detailed Service Manual

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3.1.3.5 Antenna Switch

The antenna switch consists of discrete components which comprise three ports, transmit, receive
and output path. During transmit mode, the antenna switch will be turned ON via Filter_Raw B+ and
input logic gate from Ant_Swi. When the conditions are fulfilled, the antenna switch will be turned ON
and the signal will route to the output port as it will notice high impedance on the receive path. The
same concept is applied during the receive mode where the switch is in OFF state, which provides
high RF impedance on the transmit mode.
3.1.3.6 Reverse Power Protection
The radio, while in receive mode is constantly monitoring the input power from the antenna. This
power is sensed by the directional coupler and channeled into an RF detector U1106. The matching
network between the coupler and the detector consists of R1107, L1102, C1105 and C1107. Once
the input RF level exceeds a certain limit, the detector trips a logic circuit which enables attenuation
to protect the RF front end. This is to protect the front end from receiving large signal damage.
3.1.3.7 Transmitter Power Control
In TX mode, the transmitter Automatic Level Control (ALC) section enables the transmitter and
controls the TX power in all modes. Power control is based on a unique dual control loop approach
which utilizes voltage control in one loop and current control in the other. The voltage control loop is
normally used in all transmit modes. The only time the current control loop controls TX power is
during the end of a TX slot in TDMA (F2) mode in the event transmitter saturation is detected.
Several other functions included in the TX ALC section of the radio are RX/TX switching, thermal
cutback of power, current cutback of power, and reverse power detection with means to disable the
receiver in the event of high reverse power at the antenna port.
3.1.3.7.1 Voltage Control Mode
The heart of the voltage control loop is a logarithmic amplifier based power control IC, U1105. Quad
DAC, U1125, receives the power tuning values via the SPI bus and converts them into a voltage at
VOUTB." Resistors, R1121 and R1122, form a voltage divider to set the full-scale value of the DAC,
in this case approximately 1.4V. This power set voltage is then fed to the power control IC through
the current cutback op amp, U1130, and then into a lesser-of-two voltage decision circuit, consisting
of U1126 and U1127. This circuit, used exclusively in voltage control mode, provides the important
function of combining the MAKO ramp output with the DAC power set voltage to permit power
leveling since the MAKO DAC max amplitude cannot be controlled during TDMA mode. In all other
TX modes, the MAKO output is a fixed voltage, approximately 1.5V, which is always higher than the
DAC control voltage. The lesser-of-two circuit will then select the smaller input, the set voltage from
U1125, resulting in immediate TX turn on in analog or ASTRO mode. IN TDMA mode, the MAKO line
is a piecewise linear ramp whose timing is in accordance with F2 requirements. At t = 0, the ramp
line is smaller than the TX set voltage so the MAKO ramp will control the TX power level, resulting in
a slower ramping up of the TX power. This continues until the MAKO ramp output reaches the level
of the power tuning DAC (which is always lower than the MAKO ramp maximum) which causes
control of TX power to be turned over to the power tuning DAC. The output of the selector circuit
passes through a 2nd order low pass filter (U1142) and then to the log amp, U1105. The low pass
filter performs the dual function of improving transient ACPR by transforming a linear ramp with
corners into a smooth second order waveform and by acting as a reconstruction filter for the DAC.
The log amp converts RF power fed back from the TX PA into a current which is summed with the
current from the conversion of the setpoint voltage from DAC U1125. Any imbalance between the RF
input level and the level corresponding to the setpoint voltage is corrected at the VAPC output of the
log amp which in turn drives the control voltage input of the RFPA. The setpoint voltage effectively
nulls the error in the loop caused by changes in the RF level fed back to the log amp. RF from the
RFPA is coupled through a directional coupler embedded in the PC board and passed through a LC
equalizer and then to digital attenuator, U1112, which is used to implement thermal cutback in the
Theory of Operation: Main Board