Setting The Receive Mode; Contents Of The Receive Data Register - Commodore Amiga Hardware Reference Manual

SETTING THE RECEIVE MODE
The number of bits that are to be received before the system tells you that the receive
register is full may be defined either as eight or nine. In either case, the receive circuitry
expects to see one start bit, eight or nine data bits, and at least one stop bit.
Receive mode is set by bit 15 of SERPER. Bit 15 is a 1 if if you chose nine data bits for
the receive-register full signal, and a 0 if you chose eight data bits. The normal state of
this bit for most receive applications is a
o.
SERPER is a write-only register.
CONTENTS OF THE RECEIVE DATA REGISTER
The serial input data-receive register is 16 bits wide. It contains not only the input data
received but also certain status bits, which are explained below.
The data bit positions defined for read-data are taken from the "back-up" register,
which is connected to the receive-data serial shift register.
The data is received, one bit at a time, into a serial-to-parallel shift register. When the
proper number of bits has been received, the contents of this register are transferred to
the serial data read register (SERDATR) shown in table 8-10, and you are signaled that
there is data ready for you.
The back-up register is called that because immediately after the transfer of data takes
place, the receive shift register again becomes ready to accept new data. After receiving
the receiver-full interrupt, therefore, you will have up to one full character-receive time
(8 to 10 bit times) to accept the data and clear the interrupt.
Table 8-10 shows the definitions of the various bit positions within SERDATR.
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