Commodore Amiga Hardware Reference Manual page 246

assure that all data written to the disk conforms with this bit-setting. Bit 9, when a I,
tells the disk controller to look for this sync bit on every disk byte.
DSKSYNC - Disk Input Synchronizer
The DSKSYNC register is used to synchronize the input stream. If WORDEQUAL is
enabled in ADKCON, no data is transferred to memory until a word is found in the
input stream that matches the word in the DSKSYNC register. In addition, the
DSKSYNC bit in INTREQ is set when the input stream matches the DSKSYNC regis-
ter. The DSKSYNC bit in INTREQ is independent of the WORD EQUAL enable.
DSKDAT and DSKDATR Disk DMA Data Registers
These register addresses are for testing purposes only.
DSKDAT is write-only and DISKDATR is a read-only, early-read dummy address. This
register is the disk DMA data buffer. It contains two bytes of data that are either sent
(written) to or received (read) from the disk. The write mode is enabled by bit ]4 of the
DSKLEN register. The DMA controller automatically transfers data to or from this
register and RAM.
DISK INTERRUPTS
The disk controller can issue two kinds of interrupts:
o DSKSYNC (level 5, INTREQ bit l2)-the input stream matches the DSKSYNC
register.
o DSKBLK (levell, INTREQ bit 1)-disk DMA has completed.
Each of these is explained further in the sections titled "Length, Direction, DMA
Enable" and "Other Registers Involved with Disk Operations." See chapter 7, "System
Control Hardware," for more information about interrupts.
Interface Hardware 235