Table of Contents
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PCI-QUAD-AC5 User's Guide
Block Diagram
PCI-QUAD-AC5 functions are illustrated in the block diagram shown here.
A(7:0)
Port A
AC/DC
B(7:0)
Port B
C(7:0)
Port C
I/O Module
Racks
A(7:0)
Port A
AC/DC
B(7:0)
Port B
C(7:0)
Port C
A(7:0)
Port A
AC/DC
B(7:0)
Port B
C(7:0)
Port C
I/O Module
Racks
A(7:0)
Port A
AC/DC
B(7:0)
Port B
C(7:0)
Port C
Control
Bus
Controller FPGA and Logic
Decode/Status
Bus
Timing
Local Bus
Boot
PCI
EEPROM
Controller
PCI Bus (5V, 32-BIT, 33MHZ)
1-2
Introducing the PCI-QUAD-AC5
BADR2
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