Functional Details
PCI-DIO24 block diagram
PCI-DIO24 functions are illustrated in the block diagram shown here.
PORT A (7:0)
PORT B (7:0)
PORT CH (3:0)
PORT CL (3:0)
+5V
+12V
-12V
DIO signals
All digital outputs and inputs on the PCI-DIO24 are CMOS TTL. Voltages and currents associated with
external devices are usually far greater than can be supplied from a PCI-DIO24.
Caution! Direct connections to high-current/high voltage devices will damage the board.
The 82C55 digital I/O chip initializes all ports as inputs on power-up and reset. The state of the digital I/O lines
is not defined as either logic high or logic low when in input mode. Input devices connected to the PCI-DIO24
board may detect either a high or a low, and therefore may be turned off or on at power-up.
8255 DIO
PORT A
Control
Bus
PORT B
PORT CH
PORT CL
Boot
EEPROM
Figure 4. Functional block diagram
Controller FPGA and logic
Control
Registers
Interrupt
Decode/Status
Control
Bus
Timing
Local Bus
BADR1
PCI
BADR2
Controller
Interrupt
PCI BUS (5V, 32-bit, 33 MHZ)
12
Chapter 3
IRQ INPUT
IRQ ENABLE
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