SOYO SY-K7V DRAGON Plus! User Manual page 63

BIOS Setup Utility
3-4.3 CPU & PCI Bus Control
Caution: Change these settings only if you are already familiar
with the Chipset.
The [CPU & PCI Bus Control] option changes the values of the chipset
registers. These registers control the system options in the computer.
CMOS Setup Utility – Copyright ( C ) 1984-2001 Award Software
PCI Master 0 WS Write
PCI Post Write
PCI Delay Transaction
Enter:Select
:Move
F5:Previous Values
After you have completed the changes, press [Esc] and follow the
instructions on your screen to save your settings or exit without saving.
CPU & PCI Bus Control
Setting
Disabled
PCI Master 0
WS Write
Enabled
PCI Post Disabled
Write
Enabled
Disabled
PCI Delay
Transaction Enabled
CPU & PCI Bus Control
Enabled
Enabled
Disabled
+/-/PU/PD:Value F10:Save
F6:Fail-Safe Defaults
Description
When Enabled, writes to the PCI bus
are executed with zero wait states.
This item allows you to
enabled/disabled the PCI post write. Default
The chipset has an embedded 32-bit
posted write buffer to support delay
transactions cycles. Select Enabled
to support compliance with PCI
specification version 2.1.
59
SY-K7V DRAGON Plus!
Item Help
Menu Level
ESC:Exit F1:General Help
F7: Optimized Defaults
Note
Default
Default