Smb5: I/O Status; Smb6: Cpu Id Register; Smb7: Reserved - Siemens SIMATIC S7-200 System Manual

S7-200 Programmable Controller System Manual

SMB5: I/O Status

As described in Table D-6, SMB5 contains status bits about error conditions that were detected in
the I/O system. These bits provide an overview of the I/O errors detected.
Table D-6 Special Memory Byte SMB5 (SM5.0 to SM5.7)
SM Bits Description (Read Only)
SM5.0 This bit is turned on if any I/O errors are present.
SM5.1 This bit is turned on if too many digital I/O points have been connected to the I/O bus.
SM5.2 This bit is turned on if too many analog I/O points have been connected to the I/O bus.
SM5.3 This bit is turned on if too many intelligent I/O modules have been connected to the I/O bus.
SM5.4 to
Reserved.
SM5.7

SMB6: CPU ID Register

As described in Table D-7, SMB6 is the identification register for the S7-200 CPU. SM6.4 to SM6.7
identify the type of S7-200 CPU. SM6.0 to SM6.3 are reserved for future use.
Table D-7 Special Memory Byte SMB6
SM Bits Description (Read Only)
Format
SM6.0 to
Reserved
SM6.3
SM6.4 to xxxx =
SM6.7

SMB7: Reserved

SMB7 is reserved for future use.
484
MSB
7
x x x x r r r
0000 = CPU 222
0010 = CPU 224 / CPU 224XP
0110 = CPU 221
1001 = CPU 226
LSB
0
CPU ID register
r