User's Manual
IBM PowerPC 750GX and 750GL RISC Microprocessor
7.1 Signal Configuration
Figure 7-1 illustrates the 750GX's signal configuration, showing how the signals are grouped. A pinout
showing pin numbers is included in the PowerPC 750GX RISC Microprocessor Datasheet.
Figure 7-1. 750GX Signal Groups
ADDRESS
ARBITRATION
ADDRESS/
TRANSFER START/
ATTRIBUTE
ADDRESS
TERMINATION
DATA
ARBITRATION
DATA
TRANSFER
DATA
TERMINATION
Signal Descriptions
Page 250 of 377
BR
1
BG
1
ABB
1
TS
1
A[0:31]
32
AP[0:3]
4
TT[0:4]
5
TBST
1
TSIZ[0:2]
3
GBL
1
WT
1
CI
1
750GX
AACK
1
ARTY
1
DBG
1
DBWO
1
DBB
1
D[0:63]
64
DP[0:7]
8
DBDIS
1
TA
1
DRTRY
1
TEA
1
INT
1
SMI
1
MCP
1
SRESET
1
HRESET
1
RSRVR
1
TBEN
1
TLBI SYNC
1
QREQ
1
QACK
1
CKSTP_IN
1
CKSTP_OUT
1
SYSCLK
1
PLL_CFG[0:4]
5
CLK_OUT
1
PLL_RNG[0:1]
2
JTAG / COP
5
FACTORY TEST
3
INTERRUPTS/
RESETS
PROCESSOR
STATUS/
CONTROL
CLOCK
CONTROL
TEST
INTERFACE
gx_07.fm.(1.2)
March 27, 2006