speculatively executed instructions and restore the machine state to immediately after the branch. This cor-
rection can be done immediately upon resolution of the Condition Registers bits.
Branch Instructions
Table 2-27 lists the branch instructions provided by the PowerPC processors. To simplify assembly language
programming, a set of simplified mnemonics and symbols is provided for the most frequently used forms of
branch conditional, compare, trap, rotate and shift, and certain other instructions. See Appendix F, "Simplified
Mnemonics" in the PowerPC Microprocessor Family: The Programming Environments Manual for a list of
simplified mnemonic examples.
Table 2-27. Branch Instructions
Name
Branch
Branch Conditional
Branch Conditional to Link Register
Branch Conditional to Count Register
Condition Register Logical Instructions
Condition Register logical instructions and the Move Condition Register Field (mcrf) instruction are also
defined as flow-control instructions. Table 2-28 shows these instructions.
Table 2-28. Condition Register Logical Instructions
Name
Condition Register AND
Condition Register OR
Condition Register XOR
Condition Register NAND
Condition Register NOR
Condition Register Equivalent
Condition Register AND with Complement
Condition Register OR with Complement
Move Condition Register Field
Note: If the LR update option is enabled for any of these instructions, the PowerPC Architecture defines
these forms of the instructions as invalid.
gx_02.fm.(1.2)
March 27, 2006
IBM PowerPC 750GX and 750GL RISC Microprocessor
Mnemonic
b (ba bl bla)
bc (bca bcl bcla)
bclr (bclrl)
bcctr (bcctrl)
Mnemonic
crand
cror
crxor
crnand
crnor
creqv
crandc
crorc
mcrf
User's Manual
Syntax
target_addr
BO,BI,target_addr
BO,BI
BO,BI
Syntax
crbD,crbA,crbB
crbD,crbA,crbB
crbD,crbA,crbB
crbD,crbA,crbB
crbD,crbA,crbB
crbD,crbA,crbB
crbD,crbA,crbB
crbD,crbA,crbB
crfD,crfS
Programming Model
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