Table 2-23. Floating-Point Load Instructions - IBM PowerPC 750GX User Manual

Risc microprocessor
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User's Manual
IBM PowerPC 750GX and 750GL RISC Microprocessor
For software compatibility, the other two mode encodings, imprecise-nonrecoverable mode and impre-
cise-recoverable mode, default to the precise mode.
Note: For the 750GX, the ignore-exceptions mode allows floating-point instructions to complete earlier
and, thus, might provide better performance than the precise-exception mode.
• The floating-point load-and-store indexed instructions (lfsx, lfsux, lfdx, lfdux, stfsx, stfsux, stfdx,
stfdux) are invalid when the Rc bit is one. In the 750GX, executing one of these invalid instruction forms
causes CR0 to be set to an undefined value.
Floating-Point Load Instructions
There are two forms of the floating-point load instruction—single-precision and double-precision. The
behavior of double-precision floating-point load instructions, and the behavior of single-precision floating-
point load instructions are described here. Single-precision floating-point load instructions convert single-
precision data to double-precision format before loading an operand into an FPR.
The PowerPC Architecture defines a load with update instruction with rA = 0 as an invalid form.
Table 2-23 summarizes the single-precision and double-precision floating-point load instructions.

Table 2-23. Floating-Point Load Instructions

Name
Load Floating-Point Single
Load Floating-Point Single Indexed
Load Floating-Point Single with Update
Load Floating-Point Single with Update Indexed
Load Floating-Point Double
Load Floating-Point Double Indexed
Load Floating-Point Double with Update
Load Floating-Point Double with Update Indexed
Floating-Point Store Instructions
This section describes floating-point store instructions. There are three basic forms of the store instruction—
single-precision, double-precision, and integer. The integer form is supported by the optional stfiwx instruc-
tion. The behavior of double-precision floating-point store instructions, and the behavior of single-precision
floating-point store instructions are described here. Single-precision floating-point store instructions convert
double-precision data to single-precision format before storing the operands.
Programming Note: After power-on-reset, never store data from the Floating Point Register file because the
file contains unset data and might have invalid formatted floating-point data. Always initialize the Floating
Point Register file with valid floating-point data before continuing after a power-on-reset,.
Programming Model
Page 104 of 377
Mnemonic
lfs
lfsx
lfsu
lfsux
lfd
lfdx
lfdu
lfdux
Syntax
frD,d(rA)
frD,rA,rB
frD,d(rA)
frD,rA,rB
frD,d(rA)
frD,rA,rB
frD,d(rA)
frD,rA,rB
gx_02.fm.(1.2)
March 27, 2006

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