IBM PowerPC 750GX User Manual page 191

Figure 5-6. General Flow of Page and Direct-Store Interface Address Translation
Compare Virtual Address
Perform Page Table
Search Operation
PTE Not
Found
Access Faulted
Optional in the PowerPC Architecture. Implemented in the 750GX.
gx_05.fm.(1.2)
March 27, 2006
Page Address
Translation
(T = 0)
Otherwise
Generate 52-Bit Virtual
Address from Segment
Descriptor
with TLB Entries
TLB
Miss
(See Figure 5-9 on page 205)
PTE Found
Load TLB Entry
IBM PowerPC 750GX and 750GL RISC Microprocessor
Address Translation with
Segment Descriptor
Use EA[0–3] to
Select One of 16 On-Chip
Segment Registers
Check T-Bit in
Segment Descriptor
Direct-Store
Segment Address
(T = 1)*
I-Fetch with N-Bit Set in
Segment Descriptor
(No-Execute)
TLB
(See Figure 5-8 on page 203)
Hit
Access
Permitted
Translate Address
Continue Access to
Memory Subsystem
User's Manual
DSI/ISI Exception
Access
Protected
Access Faulted
*In the case of
instruction accesses,
causes ISI exception
Memory Management
Page 191 of 377