Foxconn 600A01 series User Manual page 53

Active to Precharge(Tras) (Default: Depend on Memory)
This option is used to set active to precharge(Tras).
Active to CMD<Trcd> (Default: Depend on Memory)
When DRAM is refreshed, both rows and columns are addressed separately.
This setup option allows you to determine the timing of the transition from
RAS (row address strobe) to CAS (column address strobe). The less the
clock cycles, the faster the DRAM performance.
DRAM Command Rate (Default: Depend on Memory)
This setting controls the SDRAM command rate. Selecting 1T allows SDRAM
signal controller to run at 1T (T=clock cycles) rate. Selecting 2T makes SDRAM
signal controller run at 2T rate. 1T is faster than 2T.
DRAM Burst Length (Default: Depend on Memory)
This setting allows you to set the size of Burst-Length for DRAM. Bursting
feature is a technique that DRAM itself predicts the address of the next memory
location to be accessed after the first address is accessed. To use the feature,
you need to define the burst length, which is the actual length of burst plus the
starting address and allows internal address counter to properly generate
the next memory location. The bigger the size, the faster the DRAM
performance.
Write Recovery Time (Default: Depend on Memory)
This option allows you to set write recovery time. The setting values are: 2T, 3T.
TWTR for DDR400 ONLY (Default: Depend on Memory)
Increase DRAM performance.
600A01-FOXCONN-V1.0-BIOS-en.p65
Chapter 3
600A01 Series User Manual
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BIOS Description
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2004-4-12, 13:31