Instructions Performing Read-Modify-Write May Alter; Architectural State Before Pf - AMD 3200 - Athlon 64 2.0 GHz Processor Manual

Rev October Revision Guide for AMD Family h Models h- Fh Processors

Instructions Performing Read-Modify-Write May Alter

Architectural State Before PF

Description
An instruction performing a read-modify-write operation may be presented with a page fault PF after
modifying architectural state
Potential Effect on System
The processor may present a PF exception after some of the instruction effects have been applied to the
processor state No system effect is observed unless the operating system's page fault handler has some
dependency on this interim processor state which is not the case in any known operating system software The
interim state does not impact program behavior if the operating system resolves the PF and resumes the
instruction However this interim state may be observed by a debugger or if the operating system changes the
PF to a program error for example a segmentation fault
Suggested Workaround
None recommended
Fix Planned
Yes
Product Errata