Revision Guide for AMD Family
h Models
h- Fh Processors
Rev
October
Performance Counter May Incorrectly Count MXCSR
Loads
Description
The processor may incorrectly increment the following performance counter due to XRSTOR FXRSTOR
LDMXCSR or VLDMXCSR instructions loading the MXCSR register
PMCx
Retired Floating Point Ops
Potential Effect on System
Performance monitoring software will not have an accurate count of the number of retired floating point
operations reported by the above performance counter
Suggested Workaround
None
Fix Planned
No fix planned
Product Errata