Apic Task-Priority Register May Be Incorrect - AMD 3200 - Athlon 64 2.0 GHz Processor Manual

Rev October Revision Guide for AMD Family h Models h- Fh Processors

APIC Task-Priority Register May Be Incorrect

Description
An APIC task priority register TPR write may use an incorrect internal buffer for the data
Potential Effect on System
Incorrect interrupt prioritization
Suggested Workaround
BIOS should set MSRC A to b
Fix Planned
No fix planned
Product Errata