Programming The Status Registers; Power-On Conditions - Agilent Technologies 66312A Programming Manual

3 - Programming the DC Source

Programming the Status Registers

You can use status register programming to determine the operating condition of the dc source at any
time. For example, you may program the dc source to generate an interrupt (assert SRQ) when an event
such as a current limit occurs. When the interrupt occurs, your program can then act on the event in the
appropriate fashion.
Figure 3-7 shows the status register structure of the dc source. Table 3-1 defines the status bits. The
Standard Event, Status Byte, and Service Request Enable registers and the Output Queue perform
standard GPIB functions as defined in the IEEE 488.2 Standard Digital Interface for Programmable
Instrumentation . The Operation Status and Questionable Status registers implement functions that are
specific to the dc source.

Power-On Conditions

Refer to the *RST command description in chapter 4 for the power-on conditions of the status registers.
QUESTIONABLE STATUS
CONDITION
PTR/NTR
0
OV
1 1
1
OCP 2 2
2
FS
4
4
3
N.U.
4
OT 16
16
5-8
N.U.
9
RI 512 512
10
Unreg
1024 1024
11-13
N.U.
14
MeasOvld
16384 16384
15
N.U.
STANDARD EVENT STATUS
EVENT ENABLE
0
1 1
OPC
1
N.U.
2
4
4
QYE
3
8 8
DDE
4
16 16
EXE
5
32 32
CME
6
N.U.
7
128
128
PON
OPERATION STATUS
CONDITION
PTR/NTR
0
CAL 1 1
1-4
N.U.
5
WTG 32
32
6,7
N.U.
8
CV
256 256
9
N.U.
512 512
10
1024
1024
CC+
11
CC- 2048 2048
12-15
N.U.
32
EVENT ENABLE
1 1
2 2
4 4
16 16
512 512
1024 1024
16384 16384
OUTPUT QUEUE
DATA
DATA
DATA
EVENT ENABLE
1 1
32 32
256 256
512 512
1024 1024
2048 2048
Figure 3-7. DC Source Status Model
OFF
N.U.
0-2
QUEUE
QUES
NOT
EMPTY
MAV
ESB
MSS
OPER
SERVICE
REQUEST
STATUS BYTE ENABLE
3
8 8
4
16 16
5
32 32
6
64
7
128 128
RQS
SERVICE
REQUEST
GENERATION
),**$/
FLT