Intel S1200BTS Specification page 138

Appendix B: Integrated BMC Sensor Tables
Full Sensor Name Sensor #
(Sensor name in SDR)
Power Supply 2 Fan
Chassis-
Tachometer 1 A4h
specific
(PS2 Fan Tach 1)
Power Supply 2 Fan
Chassis-
Tachometer 2 A5h
specific
(PS2 Fan Tach 2)
Processor DIMM
Aggregate Thermal
Margin
B0h All
(Mem P1 Thrm
Mrgn)
Processor DIMM
Thermal Trip C0h All
(Mem P1 Thrm Trip)
Baseboard +12V
D0h All
(BB +12.0V)
Baseboard +5V
D1h All
(BB +5.0V)
Baseboard +3.3V
D2h All
(BB +3.3V)
Baseboard +5V
Stand-by
D3h All
(BB +5.0V STBY)
Baseboard +3.3V
Auxiliary
D4h All
(BB +3.3V AUX)
Baseboard +1.2V
Processor Vccp
D6h All
(BB P1 Vccp)
Baseboard +1.5V
VDDQ
D8h All
(BB +1.5V P1 MEM)
Baseboard CMOS
Battery
DEh All
(BB +3.3V Vbat)
126
Platform Sensor Type Event/Reading Type
Applicability
Fan Threshold
04h 01h
Fan Threshold
04h 01h
Temperature Threshold
01h 01h
Temperature Digital Discrete
01h 03h
Voltage Threshold
02h 01h
Voltage Threshold
02h 01h
Voltage Threshold
02h 01h
Voltage Threshold
02h 01h
Voltage Threshold
02h 01h
Voltage Threshold
02h 01h
Voltage Threshold
02h 01h
Voltage Threshold
02h 01h
Event Offset Triggers Contrib. To System
– –
– –
nc = Degraded
c = Non-fatal
[u,l] [c,nc]
01 – State Asserted
Fatal
nc = Degraded
[u,l] [c,nc]
c = Non-fatal
nc = Degraded
[u,l] [c,nc]
c = Non-fatal
nc = Degraded
[u,l] [c,nc]
c = Non-fatal
nc = Degraded
[u,l] [c,nc]
c = Non-fatal
nc = Degraded
[u,l] [c,nc]
c = Non-fatal
nc = Degraded
[u,l] [c,nc]
c = Non-fatal
nc = Degraded
[u,l] [c,nc]
c = Non-fatal
nc = Degraded
[u,l] [c,nc]
c = Non-fatal
Intel order number G13326-003
Intel® Server Board S1200BT TPS
Assert/De- Readable
Status assert
Value/Offsets
–
Analog
–
Analog
As and
Analog
De
As and
–
De
As and
Analog
De
As and
Analog
De
As and
Analog
De
As and
Analog
De
As and
Analog
De
As and
Analog
De
As and
Analog
De
As and
Analog
De
Event Rearm Stand-by
Data
– – –
– – –
–
R, T A
Trig
M X
Offset
–
R, T A
–
R, T A
–
R, T A
R, T A X
R, T A X
–
R, T A
–
R, T A
–
R, T A
Revision 1.0