Intel S1200BTS Specification page 135

Intel® Server Board S1200BT TPS
Full Sensor Name Sensor #
(Sensor name in SDR)
Chassis
Physical Security
Intrusion is
04h
chassis-
(Physical Scrty)
specific
FP Interrupt
Chassis -
05h
specific
(FP NMI Diag Int)
SMI Timeout
06h All
(SMI Timeout)
System Event Log
07h All
(System Event Log)
System Event
08h All
(System Event)
Button Sensor
09h All
(Button)
PCH Thermal Trip
0Dh All
(PCH Therm Trip)
Baseboard
Temperature 1
20h All
(Baseboard Temp)
Front Panel
Temperature
21h All
(Front Panel Temp)
PCH
TemperatureNote1 22h All
(PCH Temp)
Revision 1.0
Platform Sensor Type Event/Reading Type
Applicability
Physical
Sensor Specific
Security
6Fh
05h
Critical
Sensor Specific
Interrupt
6Fh
13h
SMI Timeout Digital Discrete
F3h 03h
Event
Logging Sensor Specific
Disabled
6Fh
10h
System
Sensor Specific
Event
6Fh
12h
Button/Switc
Sensor Specific
h
6Fh
14h
Temperature Digital Discrete
01h 03h
Temperature Threshold
01h 01h
Temperature Threshold
01h 01h
Temperature Threshold
01h 01h
Event Offset Triggers Contrib. To System
02 - Power down
03 - Power cycle
08 - Timer interrupt
00 - Chassis intrusion
OK
04 - LAN leash lost
00 - Front panel NMI /
diagnostic interrupt
OK
01 – State asserted
Fatal
02 - Log area reset /
OK
cleared
04 – PEF action
OK
00 – Power Button
OK
02 – Reset Button
01 – State Asserted
Fatal
nc = Degraded
[u,l] [c,nc]
c = Non-fatal
nc = Degraded
[u,l] [c,nc]
c = Non-fatal
nc = Degraded
[u,l] [c,nc]
c = Non-fatal
Intel order number G13326-003
Appendix B: Integrated BMC Sensor Tables
Assert/De- Readable
Status assert
Value/Offsets
As and
–
De
–
As
As and
–
De
–
As
As -
AS _
As and
–
De
As and
Analog
De
As and
Analog
De
As and
Analog
De
Event Rearm Stand-by
Data
Trig
A X
Offset
Trig
–
A
Offset
Trig
–
A
Offset
Trig
A X
Offset
Trig
A X
Offset
Trig
A X
Offset
Trig
M X
Offset
R, T A X
R, T A X
R, T A X
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