Interrupt Control; Dram Management - Epson C11C605001 - DFX 9000 B/W Dot-matrix Printer Service Manual

Service Manual

2.2.1.3 Interrupt Control

The
process. When the IRLO-3 is any other value, the CPU process is a rnaskable interrupt process.

DRAM Management

2.2.1.4
video controller uses DRAMs for the system RAM and for the V-RAM.
The
In this printer, a standard four 512K x 8 DRAMs are mounted in locations IC24, IC25, IC26, and
SIMM sockets. These SIMM sockets can use 1,2,4,8,16,32 MB SIMM (32-bit bus).
The DRAMs (including optional SIMMS) are managed by the ASIC E05A91. The ASIC E05A91
handles the management. The E05A91 outputs MAO-10 (memory address), RAS/CAS, and WE
signals.
DWE
CAS0,1,2,3
MAO-10
CPU Data
Bus
Rev. A
r
I
Standard
DRAM
Figure 2-40. DRAM Management
Operating Principles
SIMM
slot 1,2
2-27