Interrupt Control; Dram Management; Figure 2-35. Dram Management - Epson ActionLaser 1300 EPL-3000 Service Manual

2.2.1.3 Interrupt Control

terminals FCO through FC2 are HIGH (interrupt acknowledge), then sets the VPA terminal to LOW
and informs the CPU that this is an automatic vector interrupt. This initializes the interrupt
process. ASIC E05A83 has a controller for the automatic vector interrupt.

DRAM Management

2.2.1.4
The video controller circuit uses DRAMs for the system RAM and for the V-RAM.
The DRAMs (including optional SIMMS) are managed by ASIC E05A83 and E05B01. ASIC E05A83
handles the main management. The E05A83 outputs RAS/CAS, WE, and OE signals. The DRAMs
(including optional SIMMS) are controlled by the CAS, WE, and OE signals from the E05A83, and
are also controlled by the RAS signal from the E05B01.
O E
A d d r e s s W E
Rev. A
D a t a CASLICASU
SIMM
1

Figure 2-35. DRAM Management

REFRSH
RASEN "
" L:J
IC23
Operating Principles
2-23