2.2.1.1 Reset Circuit
The entire system (the CPU and the external devices) can be initialized if the RESET signal (CPU
pin 113) are active simuhaneously. This circuit uses an M51938 IC to monitor the supply voltage if
a voltage level less than 4.25 V is detected. The reset time is approximately 128 ms.
L
+
c
2.2.1.2 Bus Control Circuit
The MBS6930 CPU outputs the R/W (read/write) signal, AS (address strobe) signal, and the BE(),
BE1, BE2, and BE3 signals (byte embles) to the ASIC EQ5A91. The ASIC E4)5A91 uses these signals
to generate the RD (read strobe) signal, WR (write strobe) signal, and READY signal.
CPU
(ICI)
2-26
4
Figure 2-38. Reset Circuit
AS
BE()-3
- u T
—
Bus
Bus
Figure 2-39. Bus Control Circuit
WR
Rev. A