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MICRO PANEL
VSD Logic Board
The VSD Logic Board communications with the chiller
Chiller Control Board via comms and controls the VSD
functions. It converts the frequency and run commands
from the Chiller Control Board into the necessary volt-
age and frequency commands to operate the inverter
section. It also controls the converter section of the
drive (AC Line to DC Buss conversion) by controlling
the pre-charge function.
The VSD Logic Board contains a 2nd microprocessor
(motor controller) that generates the PWM signals that
control the IGBT outputs in the inverter section of the
VSD.
An FPGA handles the hardware safeties that can shut
down the VSD much faster than the software safeties.
The VSD Logic Board handles all of the VSD related
safeties, which includes motor current, BUS voltage,
and other safeties.
The VSD Logic Board reports shutdown information
back to the Chiller Control Board via the RS-485 com-
munication link.
2, 3, and 4 compressor chillers all use the same software.
The microprocessor determines whether the chiller is a
2, 3, or 4 compressor chiller by electronically check-
ing for a factory-installed jumper in the system wiring
harness. The micro checks for the jumper located in
the J1 plug wiring harness at power-up. If no jumper
or more than one jumper is sensed, the microprocessor
will inhibit start-up. Details regarding the location of
the jumper are provided on Page 168 in the CHILLER
CONFIGURATION JUMPERS section.
VSD Start/Run Initiation
Following a successful precharge of the DC Bus and a
run command from the Chiller Control Board, the VSD
Logic Board microprocessor will determine the motor
output voltage (% modulation) and the output frequency
required based on the operating frequency command
from the Chiller Control Board. This information will
then be sent to the PWM generator located on the VSD
Logic Board.
198
SECTION 8 - MICRO PANEL
VSD OPERATION AND CONTROLS
On start-up, the output frequency from the VSD to the
motor(s) will be increased from 0 Hz to the operating
frequency commanded by the Chiller Control Board.
The rate of change of the frequency will also be con-
trolled by theVSD Logic Board.
The rate of change of the output frequency at start-up,
during acceleration is 10 Hz/sec between 0 and 50 Hz
and 30.4 Hz/sec above 50 hertz. The maximum rate
of change of the output frequency during deceleration
between 200-100 Hz is 30.4 Hz/sec, and 100-0 Hz is
10 Hz/sec.
The VSD Logic Board and it's PWM generator will
receive operating frequency and voltage commands
from the Chiller Control Board based on the load.
When a frequency (speed) change is requested
from the Chiller Control Board, the chiller micro
will send the change to the VSD Logic Board and
the VSD Logic Board will acknowledge it ac-
cepted the change. Loading and unloading will
take place at the rate of 0.1-1Hz every 2 seconds.
PWM Generator Type and Carrier Frequency
The PWM generator is responsible for providing asym-
metrical uniform sampled PWM waveforms to the
compressor motor at a carrier frequency of 3125 Hz by
turning on an off the inverter IGBT's. The waveform
generated is equivalent to a specific V/F ratio at a given
speed based on the voltage and frequency commands
from the Chiller Control Board. The PWM Generator
receives operating frequency and voltage commands
from the VSD Logic Board control processor.
Short Circuit Protection Minimum Output
Pulse Width and Interlock Delay
The PWM generator is programmed to drop all "on"
pulses in less than 10 microseconds (and all matching
"off" pulses in the mirrored waveform) to permit time
for the IGBT gate drivers to detect and self extinguish
an inverter short circuit condition.
FORM 201.21-NM1 (1223)
JOHNSON CONTROLS
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