Advertisement
APPENDIX D
A
D
M
2
0
0
0
0
1
PCI-1712/1712L User's Manual
Table D-7: Analog Input Acquisition Mode
A
D
M
1
A
D
M
0
0
0
1
1
0
1
1
0
0
This bit is used to select the A/D sample clock source.
0 means internal clock.
1 means external clock (from pin AI_CLK).
This bit is used to select the A/D conversion trigger source.
0 means external digital TTL-trigger (from pin AI_TRG).
1 means threshold analog trigger (from pin ANA_TRG).
This bit specifies the type of trigger edge for A/D conver
sion.
0 means rising edge.
1 means falling edge.
This bit sets the Analog I/O calibration mode.
0 means the PCI-1712 is in normal mode. All analog input
channels are connected to 68 pin SCSI-II connector
respectively.
1 means the PCI-1712 is in AI/O calibration mode. The
wiring becomes that AI0 is connected to 0 V (AGND), AI2
is connected to +5 V, AI4 is connected to AO0, and AI6 is
connected to AO1 automatically.
This bit indicates if the DMA counter is terminal count.
1 means terminal count of DMA counter occurred.
– 88 –
Get other manuals https://www.bkmanuals.com
0
i S
g n
e l
V
l a
P
c a
r e
o P
t s
T -
i r
g g
D
l e
y a
T -
i r
g g
A
o b
t u
T -
i r
g g
M
a e
i n
g n
e u
A
c
u q
s i
i t i
n o
M
o
e d
A
c
u q
s i
i t i
n o
M
o
e d
r e
A
c
u q
s i
i t i
n o
M
o
e d
r e
A
c
u q
s i
i t i
n o
M
o
e d
r e
A
c
u q
s i
i t i
n o
M
o
e d
Advantech Co., Ltd.
www.advantech.com
Advertisement
