Fujitsu ULTIMA90 Maintenance Manual page 161

Figure 5.3.18 Bi-polar motor drive circuit
[Error detection circuit]
] Over current detection
If the space motor, line feed motor, or tractor motor current exceeds the respective absolute rated value, an over
current detection signal is sent to the FPGA.
After a given period of the receipt of the detection signal, the FPGA controls the POWST signal to turn off +40 V.
It also notifies the MPU of the occurrence of a driver error.
[Open/close, APTC, and CSF motor control and drive circuits]
The phase data and switchover timing for the open/close, APTC, and CSF motors are controlled by FPGA motor control, but
current control is not performed.
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