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Super X13SEED-F/-SF User's Manual
Memory RAS Configuration
Use this submenu to configure the following Memory Reliability_Availability_Service-
ability (RAS) settings.
Mirror Mode (Available when "ADDDC Sparing" is set to Disabled)
Use this feature to configure the mirror mode settings for all 1LM/2LM memory mod-
ules in the system, which will create a duplicate copy of data stored in the memory to
increase memory security. This will halve memory capacity. The options are Disabled,
Full Mirror Mode, and Partial Mirror Mode.
UEFI ARM Mirror (Available when "ADDDC Sparing" is set to Disabled and
"Mirror Mode" is set to Disabled)
If this feature is set to Enable, mirror mode configuration settings for UEFI-based Ad-
dress Range memory will be enabled upon system boot. This will create a duplicate
copy of data stored in the memory to increase memory security, but it will reduce the
memory capacity into half. The options are Disabled and Enabled.
ARM Mirror percentage (Available when "UEFI ARM Mirror" is set to Enabled)
Use this feature to set the percentage of memory space to be used for UEFI ARM
mirroring for memory security enhancement. Enter the percentage to be mirrored in
basis points, such as 1275 (12.75%). The default setting is 0.
Correctable Error Threshold
Use this feature to specify the threshold value for correctable memory-error logging,
which sets a limit on the maximum number of events that can be logged in the memory
error log at a given time. The default setting is 512.
Leaky Bucket Low Bit
Use this feature to set the Low Bit value for the Leaky Bucket algorithm, which is used
to check the data transmissions between the CPU socket and the memory controller.
The default setting is 11.
Leaky Bucket High Bit
Use this feature to set the High Bit value for the Leaky Bucket algorithm, which is used
to check the data transmissions between the CPU socket and the memory controller.
The default setting is 14.
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