Delta Electronics Elevator Drive VFD-VL User Manual page 227

Appendix B Accessories|
Terminal Symbols
SIN, SIN',
COS, COS'
A/O,
A/O , B/O, B
/O
Z/O, Z
EMVL- PGH01
A/O
A/O
B/O
B/O
Z /O
Z /O
4. Output Signal Setting of the Frequency Divider
It generates the output signal of division factor
"n" after dealing with the input pulse. Please
set by the switch SW1 on the card.
ON
0
1
3 4 5 6 7 8 9 10 11 12
1 2
B-30
Descriptions
Sine line driver input signal
(absolute signal)
Signal output for PG feedback
/O,
card and can be used as a
frequency divider.
VP
0V
A+
A-
B+
B-
Z +
Z -
SIN
SIN'
COS
COS'
Division Factor
Specifications
0
360 mech.
0
0
90 mech.
0
Line driver RS422
Max. output frequency: 100 kHz
RESERVE: reserved bit (PIN1)
I/MODE: input type setting of the division
pulse (PIN 2)
O/MODE: output type setting of the division
pulse (PIN 3)
RST: clock reset bit (PIN 4)
Division factor: setting for division factor n:
1~256 (PIN5~12)
Revision Nov. 2008, VLE1, SW V1.03
0.8....1.2Vss
SIN
(~ ~ 1Vss; Z =1k )
0
COS
Encoder
PG