Pads; Mpio Pad Behavior When Associated Power Rail Is Enabled; Internal Pull-Ups For Cz Type Pins At Power-On; Schmitt Trigger Usage - Nvidia Jetson TX2 Manual

13.0 PADS

13.1 MPIO Pad Behavior when Associated Power Rail is Enabled

Jetson TX2/TX2i CZ (see note) type MPIOs pins may glitch w hen the associated pow er rail is enabled or disabled. Designers
should take this into account. MPIOs of this type that must maintain a low state even w hile the pow er rail is being ramped up or
dow n may require special handling. The CZ type pins are used on the follow ing module pins:
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I2S[3:2]_x
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SDCARD_x
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CANx
Note: The Pin Descriptions section of the Jetson TX2/TX2i Data Sheet includes the pin type information.

13.2 Internal Pull-ups for CZ Type Pins at Power-on

The MPIO pads of type CZ (see note) are on blocks that can be pow ered at 1.8V or 3.3V. If the associated block is pow ered at
1.8V, the internal pull-up at initial pow er-on is not effective. The signal may only be pulled up a fraction of the 1.8V rail. Once
the system boots, softw are can configure the pins for 1.8V operation and the internal pull-ups w ill w ork correctly. Signals that
need the pull-ups during pow er-on should have external pull-up resistors added. If the associated block is pow ered at 3.3V by
default, the pull-ups w ork correctly. The affected pins listed below . These are the module CZ Type Pins on blocks pow ered at
1.8V w ith Pow er-on-Reset Default of Internal Pull-up Enabled. The SD_CARD & SDIO (TX2i only) pins are CZ type, but the
associated pow er rails are not enabled at pow er-on – softw are enables these at a later time. As long as the sof tw are configures
the pins appropriately for the voltage, the issue w ill not affect the SD_CARD & SDIO (TX2i only) pins.
-
CAN1_DOUT
-
CAN1_DIN
-
CAN0_DOUT
-
CAN0_DIN
Note: The Pin Descriptions section of Jetson TX2/TX2i Data Sheet includes the pin type information.

13.3 Schmitt Trigger Usage

The MPIO pins have an option to enable or disable Schmitt Trigger mode on a per -pin basis. This mode is recommended for
pins used for edge-sensitive functions such as input clocks, or other functions w here each edge detected w ill affect the
operation of a device. Schmitt Trigger mode provides better noise immunity, and can help avoid extra edges from being "seen"
by the Tegra inputs. Input clocks include the I2S & SPI clocks (I2Sx_SCLK & SPIx_SCK) w hen Tegra is in slave mode . The
FAN_TACH pin is another input that could be affected by noise on the signal edges. The SD_CARD pin (Tegra SDMMC1_CLK
function), w hile used to output the SD clock, also samples the clock at the input to help w ith read timing. Therefore, the
SD_CARD_CLK pin may benefit from enabling Schmitt Trigger mode. Care should be taken if the Schmitt Trigger mode setting
is changed from the default initialization mode as this can have an effect on interface timing.

13.4 Pins Pulled/Driven High During Power-on

Jetson TX2/TX2i is pow ered up before the carrier board (See Pow er Sequencing section). The table below lists the pins on the
module that default to being pulled or driven high. Care must be taken on the carrier board design to ensure that any of these
pins that connect to devices on the carrier board (or devices connected to the carrier board) do not cause damage or excessive
leakage to those devices. The SD_CARD & SDIO (TX2i only) pins are not included because the associated pow er rails are not
enabled at pow er-on – softw are enables these at a later time. Some of the w ays to avoid issues w ith sensitive devices are:
▪
External pull-dow ns on the carrier board that are strong enough to keep the signals low are one solution, given that
this does not affect the function of the pin. This w ill not w ork w ith RESET_IN# w hich is actively driven high.
JETSON TX2/TX2i OEM PRODUCT | DESIGN GUIDE | 20180618
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AO_DMIC_IN_x
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GPIO[18,17,11,9,8,6]/x
-
SDIO_x (TX2i only )
NVIDIA Jetson TX2/TX2i OEM Product Design Guide
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