Nvidia Jetson TX2 Manual page 100

Pin # Module Pin Name
E44 PEX0_TX+
E45 PEX0_TX–
E46 GND
E47 GBE_LINK_ACT#
E48 GBE_MDI0+
E49 GBE_MDI0–
E50 PEX1_RST#
F1 AUDIO_MCLK
F2 GPIO19_AUD_RST
F3 SPI0_CS0#
F4 SPI0_MOSI
F5 I2S3_LRCLK
F6 I2S3_SDOUT
F7 GPIO1_CAM1_PWR#
F8 CAM1_MCLK
F9 CAM0_MCLK
F10 GND
F11 RSVD
F12 RSVD
F13 SPI1_MOSI
F14 SPI1_MISO
F15 GND
F16 SPI2_CS1#
F17 SDCARD_CD#
F18 SDCARD_D3
F19 SDCARD_D2
F20 SDCARD_WP
F21 GND
F22 CSI4_D0–
F23 CSI4_D0+
F24 GND
F25 CSI2_D0–
F26 CSI2_D0+
F27 GND
F28 CSI0_D0–
F29 CSI0_D0+
F30 GND
F31 DSI2_D0+
F32 DSI2_D0–
F33 GND
F34 DSI0_D0+
F35 DSI0_D0–
F36 GND
F37 DP0_TX1–
F38 DP0_TX1+
F39 GND
F40 PEX2_RX+
F41 PEX2_RX–
F42 GND
F43 USB_SS0_RX+
F44 USB_SS0_RX–
F45 GND
F46 GBE_LINK1000#
F47 GBE_MDI1+
F48 GBE_MDI1–
F49 GND
F50 GBE_LINK100#
G1 I2S0_SDIN
JETSON TX2/TX2i OEM PRODUCT | DESIGN GUIDE | 20180618
Tegra Signal Usage/Description
PEX_TX4P PCIe 0 Transmit+ (PCIe IF #0 Lane 0)
PEX_TX4N PCIe 0 Transmit– (PCIe IF #0 Lane 0)
− GND
− GbE RJ45 connector Link ACT (LED0)
− GbE Transformer Data 0+
− GbE Transformer Data 0–
PEX_L2_RST_N PCIe 1 Reset (PCIe IF #2)
AUD_MCLK Audio Codec Master Clock
GPIO_AUD1 Audio Codec Reset or GPIO
GPIO_SEN4 SPI 0 Chip Select 0
GPIO_SEN3 SPI 0 Master Out / Slave In
DAP4_FS I2S Audio Port 3 Left/Right Clock
DAP4_DOUT I2S Audio Port 3 Data Out
GPIO_CAM3 Camera 1 Powerdown or GPIO
EXTPERIPH2_CLK Camera 1 Reference Clock
EXTPERIPH1_CLK Camera 0 Reference Clock
− GND
− Not used
− Not used
GPIO_CAM6 SPI 1 Master Out / Slave In
GPIO_CAM5 SPI 1 Master In / Slave Out
− GND
GPIO_MDM4 SPI 2 Chip Select 1
GPIO_EDP2 SD Card Card Detect
SDMMC1_DAT3 SD Card (or SDIO) Data 3
SDMMC1_DAT2 SD Card (or SDIO) Data 2
GPIO_EDP1 SD Card Write Protect
− GND
CSI_E_D0_N Camera, CSI 4 Data 0–
CSI_E_D0_P Camera, CSI 4 Data 0+
− GND
CSI_C_D0_N Camera, CSI 2 Data 0–
CSI_C_D0_P Camera, CSI 2 Data 0+
− GND
CSI_A_D0_N Camera, CSI 0 Data 0–
CSI_A_D0_P Camera, CSI 0 Data 0+
− GND
DSI_C_D0_P Display, DSI 2 Data 0+
DSI_C_D0_N Display, DSI 2 Data 0–
− GND
DSI_A_D0_P Display, DSI 0 Data 0+
DSI_A_D0_N Display, DSI 0 Data 0–
− GND
HDMI_DP0_TXDN1 DisplayPort 0 Lane 1– or HDMI Lane 1–
HDMI_DP0_TXDP1 DisplayPort 0 Lane 1+or HDMI Lane 1+
− GND
PCIe 2 Receive+ (PCIe IF #0 Lane 2 or
PEX_RX3P
PCIe IF #1 Lane 0)
PCIe 2 Receive– (PCIe IF #0 Lane 2 or
PEX_RX3N
PCIe IF #1 Lane 0)
− GND
USB SS 0 Receive+ (USB 3.0 Port #0
PEX_RX0P
muxed w/PCIe #2 Lane 0)
USB SS 0 Receive– (USB 3.0 Port #0
PEX_RX0N
muxed w/PCIe #2 Lane 0)
− GND
− GbE RJ45 connector Link 1000 (LED2)
− GbE Transformer Data 1+
− GbE Transformer Data 1–
− GND
− GbE RJ45 connector Link 100 (LED1)
DAP1_DIN I2S Audio Port 0 Data In
NVIDIA Jetson TX2/TX2i OEM Product Design Guide
Usage on the Carrier
Direction
Board
Output
PCIe x4 Connector
Output
GND −
Output
LAN Bidir
Bidir
M.2 Key E Output
Expansion Header Output
Output
Bidir
Display Connector
Bidir
Bidir
Bidir
Camera Connector Output
Output
Output
GND −
− −
− −
Bidir
Expansion Header
Bidir
GND −
Display/Camera Conns. Bidir
Input
Bidir
SD Card
Bidir
Input
GND −
Input
Camera Connector
Input
GND −
Input
Camera Connector
Input
GND −
Input
Camera Connector
Input
GND −
Output
Display Connector
Output
GND −
Output
Display Connector
Output
GND −
Output
Display Connector
Output
GND −
Input
PCIe x4 Connector
Input
GND −
Input
USB 3.0 Type A
Input
GND −
Output
LAN Bidir
Bidir
GND −
LAN Output
Expansion Header Input
Pin Type
PCIe PHY, AC-Coupled on
carrier board
GND
CMOS – 3.3V tolerant
MDI
Open Drain 3.3V, Pull-up on
the module
CMOS – 1.8V
CMOS – 1.8V
CMOS – 1.8V
CMOS – 1.8V
CMOS – 1.8V
CMOS – 1.8V
CMOS – 1.8V
CMOS – 1.8V
CMOS – 1.8V
GND
−
−
CMOS – 1.8V
CMOS – 1.8V
GND
CMOS – 1.8V
CMOS – 1.8V
CMOS – 3.3/1.8V
CMOS – 3.3/1.8V
CMOS – 1.8V
GND
MIPI D-PHY
GND
MIPI D-PHY
GND
MIPI D-PHY
GND
MIPI D-PHY
GND
MIPI D-PHY
GND
AC-Coupled on carrier
board
GND
PCIe PHY, AC-Coupled on
carrier board
GND
USB SS PHY, AC-Coupled
(off the module)
GND
CMOS – 3.3V Tolerant
MDI
GND
CMOS – 3.3V Tolerant
CMOS – 1.8V
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