Ip4856Cx25 U104 Adapter Pinout - Xilinx VCK190 Series User Manual

A secure digital (SD) card connector is provided for booting and file system storage. This
interface is used for the SD boot mode and supports SD2.0 and SD3.0 access.
The SDIO interface signals PMC_MIO[26:36, 51] are connected to XCVC1902 ACAP bank 501,
which has its VCCO set to 3.3V. Six SD interface nets PMC_MIO[26, 29, 30:33] are passed
through a Nexperia IP4856CX25 SD 3.0-compliant voltage level-translator U104 (mounted on an
Aries adapter), present between the XCVC1902 ACAP and the SD card connector (J302). The
Nexperia IP4856CX25 U104 device provides SD3.0 capability with SDR104 performance. The
Aries adapter schematic pinout to IP4856CX25 device pinout cross-reference table is shown in
the following table and also on the VCK190 schematic page for this circuit.
The Nexperia SD3.0 level shifter is mounted on an Aries adapter board (located on the bottom of
the board under SD socket J302) that has the pin mapping shown in the table.
Table 8: IP4856CX25 U104 Adapter Pinout
Aries Adapter Pin Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
UG1366 (v1.0) January 7, 2021
VCK190 Board User Guide
Chapter 3: Board Component Descriptions
IP4856CX25 Pin Number
C1
C3
D3
D2
E2
E4
B4
C4
A3
A4
B3
A2
D1
B2
B1
E1
E3
A1
E5
D5
C5
D4
B5
A5
C2
IP4856CX25 Pin Name
CLK_IN
GND
CD
CMD_H
CLK_FB
WP
VLDO
VSD_REF
DIR_0
VSUPPLY
VCCA
DIR_CMD
DATA0_H
SEL
DATA3_H
DATA1_H
DIR_1_3
DATA2_H
DATA1_SD
DATA0_SD
CLK_SD
CMD_SD
DATA3_SD
DATA2_SD
ENABLE
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