Pinout Of The Jtag To Xilinx Ml605 Adaptor - Xilinx ML605 Manual

Modifying xilinx ml605 for direct jtag access

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Pinout of the JTAG to Xilinx ML605 Adaptor

The "JTAG to Xilinx ML605" adaptor converts from the pinout of the Lauterbach TRACE32 PPC dongle

(also used for debugging MicroBlaze) to the JTAG header J5 on the HW-FMC-105-DEBUG board.

The design needs to take into account that the FMC daughter boards for ML605 are intended to host

devices inside the JTAG chain i.e. extending the chain by an additional device. The debugger, however,

needs to be at the beginning and the end of the JTAG chain to drive the signals. Therefore the adaptor

connects its TDI line to the TDO signal of the HW FMC 105 DEBUG board. The additional TDO pin on the

adaptor receives the TDO signal of the last device of the board (the Virtex6 FPGA).

PPC dongle

TDO

TDI

(TDO_ML605)

TCK

TMS

VCC

GND

NOTE:

Modifying Xilinx ML605 for Direct JTAG Access 7

J5 on HW-FMC-105-

DEBUG

extra Pin

last device TDO

TDO

(TDO_ML605)

TCK

TMS

VCC

GND

For trouble shooting or JTAG chain diagnostics you might want to connect a

Xilinx platform cable to the HW_FMC_105_DEBUG daughter board. In this

case you also need to cross TDI and TDO as explained above or connect it to

the Lauterbach adaptor.

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