Panasonic FP Series Programming Manual page 494

Operands
For
s
d1
Error flags
No. IEC address
%MX0.900.7
R9007
%MX0.900.8
R9008
 An error occurs if this is executed when the FIFO buffer is full (the
number of stored data items = the size n of the FIFO defined by the
FIFT instruction). Writing is inhibited.
 If this is executed when the writing pointer is indicating the final
address in the FIFO buffer (the "n" value defined by the FIFT
instruction), the writing pointer will be set to 0.
This example illustrates the FIFO buffer by incorporating the functions F115_FIFT (see page 483),
Example
F116_FIFR (see page 487) and F117_FIFW (see page 491). The function has been programmed
in ladder diagram (LD) and structured text (ST).
DUT
POU header All input and output variables used for programming this function have been declared in the POU
header.
Relay
WX WY WR WL
- WY WR WL
Set
permanently
for an instant
T/C Register
SV EV DT LD FL
SV EV DT LD FL
If
 the size (n) of the FIFO specified by d1 is
n = 0, or when n > 256.
 the number of stored data items of the
FIFO = 0.
 the number of stored data items of the
FIFO > FIFO size (n).
 the final address of the FIFO based on
the FIFO size (n) exceeds the area.
 the FIFO writing pointer > FIFO size (n).
 the FIFO writing pointer is 256 (16#100)
or higher after the data has been written.
Arithmetic instructions
Constant
dec. or hex.
-
493