Pi-Pt (Processor Interface Port) - Avaya Definity SI Maintenance Manual

Maintenance Object Repair Procedures

PI-PT (Processor Interface Port)

MO Name (in Alarm
Alarm Log) Level
PI-PT MAJOR
PI-PT WARNING
1 Where P is the port network number (1 for PPN only); C is the carrier designation (for example, A or
B for processor complex circuit packs); and S is the address of the slot in the carrier where the circuit
pack is located (for example, 1 or 2 for either the first or second Processor Interface circuit packs).
PI-PT is the physical port on the TN765 Processor Interface circuit pack. If the
Processor Interface Link (PI LINK) MO raises an alarm that can be correlated to
an on-board port problem, then PI-PT is alarmed. In a system without High or
Critical Reliability, there are no tests that run directly on Processor Interface port.
The PI-LINK MO is responsible for the testing of the TN765 ports along with DCS
links, AUDIX links, ISDN links, etc. Refer to the PI-LINK (Processor Interface Link)
Maintenance documentation for details. In a High or Critical Reliability system,
Processor Interface port is used to test the ports on the Standby Processor
Interface circuit packs. If the test fails, a Major alarm is raised. More importantly, if
a software requested SPE-interchange takes place and an alarm is raised on the
Processor Interface port, then the interchange may abort due to alarm severities.
Error Log Entries and Test to Clear Values
Table 10-465. Processor Interface Port PI-PT Error Log Entries
Error Aux
Type Data
1
0 0 Any
1 Standby PI Port Test
(#404)
18 0 busyout data-module
<ext>
123 (a) Any None
130 (b) None
257 (a) Any None
1 Run the Short Test Sequence first. If all tests pass, run the Long Test Sequence. Refer to the
appropriate test description and follow the recommended procedures.
10-1248 Issue 4 May 2002
Initial Command to Run
test interface PCS sh
release data-module <ext>
Alarm
Associated Test Level
Any
MAJOR
WARNING
MAJOR
MAJOR
1
Full Name of MO
Processor Interface Port
Processor Interface Port
On/Off
Board Test to Clear Value
Any test interface PCS sh r 1
ON test interface PCS sh
OFF release data-module <ext>
ON test link lnk-no
ON test link lnk-no l
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