Intel Pentium 4 Design Manual page 6

In the 478-pin package / intel 850 chipset family platform
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Introduction
9.1.3
9.1.4
9.2
Communication and Networking Riser (CNR).................................................... 139
9.2.1
9.3
9.3.1
9.3.2
9.4
USB Guidelines .................................................................................................. 148
9.5
IOAPIC Design Recommendations .................................................................... 149
9.6
SMBus/SMLink Interface .................................................................................... 150
9.6.1
9.7
PCI...................................................................................................................... 153
9.7.1
9.8
RTC .................................................................................................................... 157
9.8.1
9.8.2
9.8.3
9.8.4
9.8.5
9.8.6
9.8.7
9.8.8
9.8.9
9.9
LAN Layout Guidelines ....................................................................................... 162
9.9.1
9.9.2
9.9.3
6
Primary IDE Connector Requirements................................................ 137
Secondary IDE Connector Requirements ........................................... 138
CNR Placement .................................................................................. 139
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AC'97 ........................................................................................................ 140
Valid Codec Configurations................................................................. 148
SMBus Architecture and Design Considerations ................................ 151
9.6.1.1
SMBus Design Considerations .......................................... 151
9.6.1.2
General Design Issues / Notes.......................................... 151
9.6.1.3
The Unified VCC_ Suspend Architecture .......................... 152
9.6.1.4
The Unified VCC_Core Architecture.................................. 152
9.6.1.5
Mixed Architecture ............................................................. 153
PCI Routing - Four-Layer Motherboard.............................................. 154
RTC Crystal......................................................................................... 157
External Capacitors............................................................................. 158
RTC Layout Considerations ................................................................ 158
RTC External Battery Connection ....................................................... 158
RTC External RTCRST Circuit............................................................ 159
RTC Routing Guidelines ..................................................................... 160
VBIAS DC Voltage and Noise Measurements .................................... 160
Power-Well Isolation Control............................................................... 161
Power Supply PS_ON Consideration.................................................. 162
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ICH2 - LAN Interconnect Guidelines......................................... 164
9.9.1.1
Bus Topologies .................................................................. 164
9.9.1.2
Point-to-Point Interconnect ................................................ 164
9.9.1.3
LOM/CNR Interconnect ..................................................... 165
9.9.1.4
Signal Routing and Layout................................................. 166
9.9.1.5
Crosstalk Considerations................................................... 166
9.9.1.6
Impedances ....................................................................... 166
9.9.1.7
Line Termination................................................................ 167
9.9.2.1
General Trace Routing Considerations ............................. 167
9.9.2.1.1
9.9.2.1.2
9.9.2.2
Power and Ground Connections........................................ 169
9.9.2.2.1
9.9.2.3
Common Physical Layout Issues....................................... 170
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82562EH Home/PNA* Guidelines ............................................. 172
9.9.3.1
Power and Ground Connections........................................ 172
9.9.3.2
9.9.3.3
Crystals and Oscillators ..................................................... 172
9.9.3.4
Phoneline HPNA Termination............................................ 173
9.9.3.5
Critical Dimensions ............................................................ 174
9.9.3.5.1
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®
Intel
Pentium
4 Processor / Intel
Trace Geometry and Length.............................. 168
Signal Isolation .................................................. 168
Considerations................................................... 169
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850 Chipset Family Platform Design Guide
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