Panasonic FP2 -C1A Manual page 80

Sample Program for Analog Input Average Processing Setting
10.1 Sample Program (CPU Unit with Analog I/O)
Sample program:
R 9013
F0 MV
Initial
setting
F151 WRT K 0
Specifies the CPU unit with analog
I/O in slot no. 0.
The 1 - word data from data register DT 0
is written to the shared memory address 16.
R 9013
F0 MV
Initial
setting
F0 MV
F0 MV
F151 WRT
Specifies the CPU unit with analog
I/O in slot no. 0.
The 3 - word contents of data register
DT 20 to DT22
is written to the shared memory addressees 22 to 24.
R 0
F0 MV
ch 0 preparation
completion
R 1
F0 MV
ch 1 preparation
completion
R 2
F0 MV
ch 2 preparation
completion
R 9010
F150 READ K 0
Always on
Specifies the CPU unit with analog
I/O in slot no. 0.
The 1 - word data from shared memory address 10
10 - 4
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, H 111 , DT 0
ch 0 and ch
2 execution
, , DT 0 , K 1 K 16 ,
, K 0 , DT 20
ch 0 average processing
, K 3 , DT 21
ch 1 average processing
, K 10 , DT 22
ch 2 average processing
, K 0 , DT 20 , K 3 K 22 ,
ch 0 to 2
average
processing
, WX 0 , DT 100
ch 0 Input value
ch 0 data
, WX 1 , DT 101
ch 1 Input value
ch 1 data
, WX 2 , DT 102
ch 2 data
ch 2 Input value
, , K 10 K 1 , ,
is read to the internal relay WR0.
Execution of conversion
processing setting for ch 0
to ch 2 analog inputs
Analog input average proc-
essing setting
ch 0: No average processing
ch 1: 3 times average proc-
ch 2: 10 times average proc-
Analog input Reading
WR 0
Preparation completion flag
for analog input
Preparation
Reading
completion
flag area
ED
FP2 Analog Unit
essing
essing