HP Series 37 Reference Manual page 66

3000 series self test and maintenance mode
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Test Descriptions
Step 22. EDAC Test -- This step verifies that single-bit error detection and correciion is performed
correctly. The 32 single-bit errors that can occur are generated. Proper error correction is
then checked. The syndrome latch is checked for proper error logging, causing the latch to
clear. Finally, a check is made to verify that the syndrome latch is cleared.
Error messages:
Multi-error was detected during single-bit error test;
Board:
Y; Block:
Y
Where: Y
=
0/1
Error in test word was not corrected; data bit XX.
Board:
Y; Block:
Y
Data expected:
%AAAAAA; Data received:
%ZZZZZZ
Where:
0
=
< '" XX <
=
31
Y
=
0/1
AAAAAA and
ZZZZZZ =
octal data
Syndrome code expected was not returned; data bit XX.
Board:
Y; Block:
Y
Expected:
%AAA; Received:
%ZZZ
Where:
0<= XX <= 3 1
Y
=
0/1
AAA and
ZZZ
=
octal syndrome codes
Syndrome latch was not cleared after status was reported;
Board:
Y
Where:
Y
=
0/1
SEP 84
3-3

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