IBM z13s Technical Manual page 111

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The z13s system design has the following main objectives:
Offer a flexible infrastructure to concurrently accommodate a wide range of operating
systems and applications, which range from the traditional systems (for example, z/OS
and z/VM) to the world of Linux, cloud, analytics, and mobile computing.
Offer state-of-the-art integration capability for server consolidation by using virtualization
capabilities in a highly secure environment:
– Logical partitioning, which allows for up to 40 independent logical servers.
– z/VM, which can virtualize hundreds to thousands of servers as independently running
virtual machines (guests).
– HiperSockets, which implement virtual LANs between logical partitions (LPARs) within
the system.
– The z Systems PR/SM is designed for Common Criteria Evaluation Assurance Level
5+ (EAL 5+) certification for security. Therefore, an application running on one partition
(LPAR) cannot access another application on a different partition, providing essentially
the same security as an air-gapped system.
This configuration allows for a logical and virtual server coexistence and maximizes
system utilization and efficiency by sharing hardware resources.
Offer high performance computing to achieve the outstanding response times that are
required by new workload-type applications. This performance is achieved by high
frequency, enhanced superscalar processor technology, out-of-order core execution, large
high-speed buffers (cache) and memory, an architecture with multiple complex
instructions, and high-bandwidth channels.
Offer the high capacity and scalability that are required by the most demanding
applications, both from the single-system and clustered-systems points of view.
Offer the capability of concurrent upgrades for processors, memory, and I/O connectivity,
avoiding system outages in planned situations.
Implement a system with high availability and reliability. These goals are achieved with the
redundancy of critical elements and sparing components of a single system, and the
clustering technology of the Parallel Sysplex environment.
Have internal and external connectivity offerings, supporting open standards such as
10 Gigabit Ethernet (10 GbE) and Fibre Channel Protocol (FCP).
Provide leading cryptographic performance. Every processor unit (PU) has a dedicated
and optimized CP Assist for Cryptographic Function (CPACF). Optional Crypto Express
features with cryptographic coprocessors provide the highest standardized security
1
certification.
These optional features can also be configured as Cryptographic
Accelerators to enhance the performance of Secure Sockets Layer/Transport Layer
Security (SSL/TLS) transactions.
Be self-managing and self-optimizing, adjusting itself when the workload changes to
achieve the best system throughput. This process can be done through the Intelligent
Resource Director or the Workload Manager functions, which are assisted by
HiperDispatch.
Have a balanced system design, providing large data rate bandwidths for high
performance connectivity along with processor and system capacity.
The remaining sections describe the z13s system structure, showing a logical representation
of the data flow from PUs, caches, memory cards, and various interconnect capabilities.
1
Federal Information Processing Standard (FIPS) 140-2 Security Requirements for Cryptographic Modules
Chapter 3. Central processor complex system design
83

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