Decimal Floating Point Accelerator; Compression And Cryptography Accelerators On A Core In The Chip - IBM z13s Technical Manual

Figure 3-11 shows the location of the coprocessor on the chip.
Input Buffer
Crypto Cipher
(DES and AES)
Figure 3-11 Compression and cryptography accelerators on a core in the chip
CP Assist for Cryptographic Function
CPACF accelerates the encrypting and decrypting of SSL/TLS transactions, virtual private
network (VPN)-encrypted data transfers, and data-storing applications that do not require
2
FIPS 140-2 level 4 security. The assist function uses a special instruction set for symmetrical
clear key cryptographic encryption and decryption, and for hash operations. This group of
instructions is known as the
these instructions, see z/Architecture Principles of Operation, SA22-7832.
For more information about cryptographic functions on z13s servers, see Chapter 6,
"Cryptography" on page 199.

3.4.6 Decimal floating point accelerator

The DFP accelerator function is present on each of the microprocessors (cores) on the 8-core
chip. Its implementation meets business application requirements for better performance,
precision, and function.
Base 10 arithmetic is used for most business and financial computation. Floating point
computation that is used for work that is typically done in decimal arithmetic involves frequent
data conversions and approximation to represent decimal numbers. This process has made
floating point arithmetic complex and error-prone for programmers who use it for applications
in which the data is typically decimal.
Hardware decimal floating point computational instructions provide the following features:
Data formats of 4 bytes, 8 bytes, and 16 bytes
An encoded decimal (base 10) representation for data
Instructions for running decimal floating point computations
An instruction that runs data conversions to and from the decimal floating point
representation
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Federal Information Processing Standard (FIPS) 140-2 Security Requirements for Cryptographic Modules
96
IBM z13s Technical Guide
LSU
millicode
CoP- store
Output Buffer
Output
merger
Crypto Hash UTF Compression
(SHA) Conversion
Message-Security Assist
To/from
ICM
XU ICM
CMPSC
(MSA). For more information about
RU
LSU
PC
L2I L2D