IBM Series 1 User Manual page 72

PROCESSOR I/O CHANNEL ELECTRICAL CHARACTERISTICS
C
Chan~!
?.!gnal Line
!le£!ri.f~! Ch~teristic§
c
o
The following information in Figure 2-21 is a description of
the I/O channel at the backpanel in a tabular form. Signal
lines are tabulated in terms of direction, I/O pin
assignment, processor driver/receiver type, and the active
and quiescent levels. Special reserved lines that are used
for storage or floating point are not listed.
The direction of a siynal is indicated
by
an arrow. An
arrow pointing to the right indicates a siynal from the
processor, pointing to
the
left, from
the
device.
A
line
with double arrows indicates a bidirectional signal.
Signal levels and driver/receiver types are listed as
they would appear at the first and succeeding I/O attachment
sockets, but not necessarily at specific pins on the
processors themselves.
The active levels shown correspond to logical
1
for
address bus bits 00-15, data bus, condition code in, cycle
indicators, poll identifier bits, and status bus bits; these
levels correspond to activation of tags and requests. The
quiescent levels are defined for the following conditions:
•
•
•
The processor and I/O device are in the state that
follows a system reset.
The Load key has not been pressed.
No reset tags are active.
Therefore, there is no channel activity to or from the
I/O devices, storage, or floating point.
An
asterisk with
an
associated number found under the
heading refers to an explanatory note.
Processor I/O Channel 2-57